1. Field of the Invention
The invention relates to a manufacturing method of a substrate structure, and more particularly to a manufacturing method of a substrate structure having a more preferable process yield rate.
2. Description of Related Art
Packaging of integrated circuit is an important step in the back-end process for manufacturing a semiconductor, the purpose thereof is to protect each chip after manufacturing process and to electrically connect the pads of the chip and printed circuit board (PCBs). The PCBs and chip carrier substrates have multiple solder joints, a process of surface finishing or metallization need to be performed on a contact surface between the solder joints and circuit layers of the PCBs or the chip carrier substrates before soldering. Generally, a double metal layer of Ni/Pd or Ni/Au, or a triple metal layer of Ni/Pd/Au may be formed on the pads of the circuit layer.
Presently, copper is mostly used as the material for the pads of the circuit layer, and a method for forming nickel layer on the pads is electroless plating (also known as chemical plating). Since the nickel layer contains component of boron or phosphorus (i.e. Ni—P or Ni—B), which may affect integrity of the microwaves communication signals, such affection is quite obvious especially when the product is used in high frequency. Furthermore, since the nickel layer is formed by chemical plating (i.e. nickel-plating with a reduction method), problems such as unstable electroplating solution and incomplete coverage of the nickel layer may occur, thereby causing a skip plating problem in the following chemical plating process for palladium-plating. Moreover, since gas (such as hydrogen) may be generated during an initial process of the electroless plating, if a thickness of the nickel layer newly formed is relatively thin, a void may be generated, or metal oxide or non-metal having impurities with higher hardness may be formed on the surface. Therefore, the thickness of the nickel layer formed by chemical plating usually requires an accumulation until it reached a certain thickness (e.g. more than 15 μm). However, the nickel layer with such thickness may cause a problem of insufficient space when being used in the products with smaller circuit gaps.